Updated version in December 2014.
Major revision of VFLOAT available December 2013.
VFLOAT, the Variable Precision Floating Point library, is the first complete floating-point library supporting variable precision available as an open source library. Since it was first introduced in 2001, the VFLOAT library has been downloaded dozens of times. It is the standard used when researchers want to compare their FPGA floating point implementations to the state of the art.
The original VFLOAT library paper,published at FPL 2002, has been referenced over 150 times:
Pavle Belanovic and Miriam Leeser, A Library of Parameterized Floating Point Modules and Their Use.12th International Conference on Field Programmable Logic and Application. September 2002.
This library influenced the 2005 VHDL floating-point library standard VHDL-200x-ft, and the work of Synthworks, BAE Systems and many more commerical enterprises. Since 2002 the library has been expanded to include more components(divide, square root, accumulate and multiply accumulate) and tested on more devices including Altera and Xilinx devices.
VFLOAT consists of a large set of floating point components, including the arithmetic operations add, subtract, multiply and divide. Conversions between fixed and floating point are also supported. All modules are implemented in VHDL.
An important feature of VFLOAT modules is that denormalize, and normalize/round are decoupled from the arithmetic operations. This gives the designer full control over where and when to normalize floating point calculations, and results in savings of area in their hardware implementation. The currently implemented arithmetic operators are floating point add/sub, multiply, reciprocal, divide, square root, accumulate and multiply accumulate.
Please let us know if you are using the library by sending email to Prof. Miriam Leeser. We would also like to receive bug reports. We do our best to keep the library up to date. The most recent update, May 2015, includes faithful rounding for Divide and Square root components.
Click here for a graph of the dependences for each of the modules in the library.
VFLOAT can be downloaded here. Library Revision from May 2015.
It is required that library users instantiate your own multipliers (mul, recip, div, sqrt) and lookup tables (recip, div and sqrt). Read the readme.txt file for details.
To use these modules, first unzip the zip file in directory fp_lib and then compile all the vhd files required for any operator or format controller. The dependencies of these modules can be found by clicking on the hyperlink on the left side of the dependency graph .
Below are some examples that implement basic single precision IEEE operations such as addition and multiplication.
| Example name | Download link |
| IEEE adder | Adder |
| IEEE multiplier | Multiplier |
| IEEE reciprocal | Reciprocal |
| IEEE divider | Divider |
| IEEE square root | Square root |
Accumulator and Multiply-Accumulate are provided: The Multiply-Accumulate is based on an adder tree and the Accumulator is created using a single adder and feedback path. Clock latency for Multiply-Accumulate is fixed and it is variable for Accumulator.
| Archive details | Date | Download link |
| Updates in 2014 | Dec, 2014 | Here |
| Updates in 2013 | Dec, 2013 | Here |
| Updated version of divider from 2008 | Sep, 2010 | Here |
| Library with old divider and square root operator | Feb, 2008 | Here |
| New accumulator | Nov, 2007 | Here |
| Fixed float2fix and fix2float | Oct, 2005 | Here |
| Original library | June, 2002 | Here |
If you have any questions or problems using the library, please contact Miriam Leeser
Publications:
Xin Fang and Miriam Leeser. Open-Source Variable-Precision Floating-Point Library for Major Commercial FPGAs, ACM Transactions on Reconfigurable Technology and Systems (TRETS), September 2016.
Xin Fang and Miriam Leeser. "Vendor Agnostic, High Performance, Double Precision Floating Point Division for FPGAs, IEEE High Performance Extreme Computing (HPEC), September 2013, Waltham, MA.
X. Wang and M. Leeser, VFloat: A Variable Precision Fixed- and Floating-Point Library for Reconfigurable Hardware, ACM Transactions on Reconfigurable Technology and Systems. Vol. 3 No. 3, September 2010.
X. Wang and M. Leeser, A Truly Two Dimensional Systolic Array FPGA Implementation of QR Decomposition, ACM Transactions on Embedded Computer Systems. Vol. 9 No. 1, October 2009.
X. Wang, M. Leeser, and S. Braganza, Advanced Components in the Variable Precision Floating-Point Library, Field-programmable Custom Computing Machines (FCCM) 2006, April 2006, Napa CA.
X. Wang, M. Leeser, and H. Yu, A Parameterized Floating-Point Library Applied to Multispectral Image Clustering, 7th Annual MAPLD International Conference, September 2004, Washington DC.
X. Wang and M. Leeser,Variable Precision Floating Point Division and Square Root,8th Annual High Performance Embedded Computing Workshop,October 2004, Lexington, MA.
Pavle Belanovic and Miriam Leeser, A Library of Parameterized Floating Point Modules and Their Use.12th International Conference on Field Programmable Logic and Application. September 2002.
Pavle Belanovic Library of Parameterized Hardware Modules for Floating-Point Arithmetic with An Example Application M.S. Thesis, Dept of Electrical and Computer Engineering, Northeastern University, June 2002
People:
Faculty: Dr. Miriam Leeser
Graduate Students: Xin Fang, Pavle Belanovic, Haiqian Yu, Sherman Braganza, Xiaojun Wang, Jainik Kathiara
Lab Visitors: Paolo Palana.
Terms:
ATTENTION:
This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.