ECE MS Thesis Defense: Griffin Knipe

MS Thesis Defense: Unifying Performance and Security Evaluation for Microarchitecture Design Exploration

Griffin Knipe

Location: Zoom Link

Abstract: Computer architects develop microarchitectural features that boost instruction-level parallelism to improve CPU performance. While performance may be improved, adding new features increases the CPU’s design complexity. This further compounds the effort required to complete design verification. Trustworthy design verification is paramount to microarchitecture design, as silicon chips cannot easily be patched in the field.
Despite the best efforts for security verification, researchers have created transient execution side-channel attacks which can exploit microarchitecture performance features to leak data across ISA-prescribed security boundaries. This motivates the unification of performance evaluation and security verification techniques to ensure that new microarchitectural features are understood from multiple design perspectives.
This thesis presents Yori, a RISC-V microarchitecture simulator that aims to enable computer architects to evaluate microarchitecture performance and security using a single framework. As Yori is a work-in-progress, this thesis presents the work-to-date, focusing on a detailed model of the reference microarchitecture and evaluation of the current model accuracy. We describe a viable methodology to interface between the Yori simulator and an existing security verification tool. We conclude the thesis, laying out a plan to complete this marriage of performance and security.