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ECE PhD Dissertation Defense: Linbin Chen
April 22, 2021 @ 10:30 am - 11:30 am
PhD Dissertation Defense: Low Power Designs using Approximate Computing and Emerging Memories at Nanoscales
Location: Zoom Link
Abstract: A power efficient integrated circuit design is essential for mobile and embedded computer systems. This dissertation proposes several novel low power designs using approximate computing and emerging memories for computers with arithmetic circuits and large on-chip caches. Initially, low power approximate designs are proposed both for fixed point radix-2 and high-radix division at circuit-level. Then, an approximate parallel CORDIC algorithm and its hardware implementation are developed. Trade-offs between circuit metrics and error characteristics are pursued by simulation and analysis. The proposed approximate arithmetic designs have excellent performance for image processing applications while significantly reducing power consumption. Then, hybrid cache designs integrating SRAM with emerging memories are also investigated. An intra-cell, as well as inter-subarray and inter-bank hybrid caches with SRAM, eDRAM and NVM (such as PCM or STT-MRAM) are proposed. Architectural level approaches such as special migration structures and policies are designed to address the eDRAM refresh requirements and the NVM large write latency issue. An analytical circuit-level model based on NVsim focusing on hybrid granularity and an architecture level model based on gem5 focusing on a migration policy are developed. To explore the hybrid cache’s benefits to main memory, a combined-cache design for addressing endurance issues of multi-level non-volatile memory in embedded system is proposed. It is shown that these hybrid cache designs exhibit smaller area and lower leakage than conventional designs so with great potential to be used for large-capacity on-chip caches in mobile and embedded systems.