Speaker: Prof. John Gustafson, Arizona State University
Title: Next-Generation Arithmetic
When: Friday, January 23, 2026, 10:00 a.m. to 11:00 a.m.
Teams Link: INSI Distinguished Seminar Speaker – John Gustafson | Meeting Chat | Microsoft Teams
Abstract: IEEE Standard floating-point arithmetic wastes energy, power, memory, and bandwidth, all of which are critical burdens for AI, high-performance computing (HPC), and embedded computing. These shortcomings have given rise to completely new ways to represent real numbers on computers, and a revolution is underway that may give us the effect of one or two more doublings of performance now that Moore’s law is no longer providing such performance doublings through transistor technology. It is also now becoming possible to customize the vocabulary of a number system to match what is required for a particular application; this means better answers are possible using fewer bits. The posit format introduced in 2017 has matured to the point where it can serve as a drop-in replacement for the outdated IEEE floating-point format. Recent developments (2025) now show that an N-bit posit can use less energy and silicon area than an N-bit IEEE float and also reduce time-per-operation. This is a breakthrough in fundamental computer design.
Speaker bio:
Prof. John L. Gustafson (www.johngustafson.net) is Chief Scientist of Vq Research and a Visiting Scholar at Arizona State University. He is the inventor of several novel forms of computer arithmetic first introduced in his 2015 book, The End of Error: Unum Computing. He extended that work in 2025 with Every Bit Counts: Posit Computing. He is best known for his 1988 argument showing that parallel processing performance need not be limited by “Amdahl’s law,” now generally known as Gustafson’s law. Previously, he has been Senior Fellow and Chief Product Architect at AMD and a Director of Intel Labs. He is a recipient of the inaugural Gordon Bell Prize and is a Golden Core member of IEEE.