Jagadeesh Vasudevamurthy

About

Jagadeesh Vasudevamurthy is a highly accomplished professional in the field of computer engineering, known for his expertise in building large commercial software and VLSI design. With over 30 years of professional experience, he has made significant contributions to both industry and academia.

Jagadeesh holds a BE with distinction in Electronics and Communication from the National Institute of Engineering, Mysore, an MTech in Computer Engineering from the Indian Institute of Technology Kharagpur, and a PhD in Computer Engineering from McGill University in Montreal, Canada. His research and academic pursuits have earned him the prestigious IEEE Best Paper Award in the area of logic synthesis. As a senior member of IEEE and an ACM member, he actively contributes to the advancement of the field.

Currently, Jagadeesh works as a Fellow at Microchip in San Jose, CA. In this role, he leverages his extensive knowledge and skills to develop cutting-edge software solutions. With his expertise in building large commercial software, he plays a crucial role in enhancing the company’s products and services.

In addition to his industry contributions, Jagadeesh is actively involved in teaching at Northeastern University. He imparts his knowledge and experience in courses such as Program Structures and Algorithms (INFO 6205) and Object-Oriented Programming using C++ (CSYE 6205). He enjoys the freedom to teach and is dedicated to ensuring that his students secure rewarding positions in the industry.

Jagadeesh’s areas of expertise include data structures and algorithms, object-oriented programming using C++, VLSI design, digital design using Verilog, digital design using FPGA, and logic synthesis algorithms. His passion for teaching and his commitment to bridging the gap between academia and industry make him a valuable asset to the Northeastern community.

With his wealth of knowledge, extensive experience, and dedication to excellence, Jagadeesh Vasudevamurthy continues to make significant contributions to the field of computer engineering and inspire the next generation of technology professionals.

Selected Publications

• J. Rajski and J. Vasudevamurthy, “The testability-preserving concurrent decomposition and factorization of Boolean expressions,” in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 11, no. 6, pp. 778-793, June 1992, doi: 10.1109/43.137523.
• A Method for Concurrent Decomposition and Factorization of Boolean ExpressionsA Method for Concurrent Decomposition and Factorization of Boolean Expressions, International Conference on Computer Aided Design (ICCAD-90), · Dec 1, 1990

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