Bruno Souto Maior Muniz Morais PhD Dissertation Defense

Title:
Enabling Domain Platform Design for Streaming Applications: A Holistic Approach

Committee Members:
Gunar Schirner (Advisor)
Prof. David Kaeli
Prof. Hamed Tabkhi (UNCC)

Time:
10:00:00 AM

Location: ISEC 601

Abstract:
In recent years, more demanding streaming applications make striking a balance between high compute performance and efficiency paramount in platforms designs for edge computing. In addition, designing a platform that is optimized for a single application is costly due to non-recurring engineering (NRE) costs. In contrast, multiple applications can be grouped in domains, e.g. computer vision, software-defined radio. Leveraging shared characteristics of similar applications within a domain, e.g. structural composition/computation patterns, a single domain platform that caters to these similarities and accelerates applications can be generated, thus benefiting multiple applications at once and dramatically improving NRE and time-to-market (TTM).

This dissertation introduces methodologies atvarious abstraction levels to enable streamlined domain platform design for streaming applications. Thrust 1 introduces high level DSE methods based on integer linear programming (ILP), Tile-based Synchronization Aware ILP (TSAR-ILP). Initially, single-application platform allocations are considered using TSAR-ILP. While TSAR-ILP only focuses on applications in isolation, its formulation lays the foundations for DmTSAR-ILP, a method that performs domain DSE with multiple applications, obtaining an optimal unified platform allocation that and achieving an increase of 22.5% in throughput, while being 70x faster when compared to previous methods (MG-DmDSE). However, DmTSAR-ILP aims to aggregate all applications fairly. This presents a challenge when the designer wishes to focus on a subset of applications. To enable ultimate flexibility in a product-oriented setting, modeled after a market analysis process, this dissertation introduces ProdDSE. ProdDSE enables application prioritization while also introducing concurrent application modeling and a multi-objective optimization (area, performance) approach. This enables up to a 3.4x boost in performance depending on use case, while also providing gains in DSE runtime (4.3x faster).

Thrust 2 introduces Sedona, a domain-specific language (DSL) and exploration enviroment that captures parametric dataflow application descriptions with language features dedicated to streaming applications. A design identified by Thrust 1 can be further refined using the tools in Thrust 2, by capturing the connectivity of a design using Sedona. Then, automatic wiring is performed for target outputs such as timing-aware simulations or RTL-level code, enabling structural manipulation at a high-level description without the burden of low-level manual integration.

Finally, to better guide the high-level decisions performed in Thrust 1 and further exploration/integration in Thrust 2, Thrust 3 considers the implications of HWACC topology choices in an HWACC-rich SoC. The ACTAR flow is introduced to explore different topologies in a RISC-V based SoC and the side-effects of topology and memory sizing choices on the system-wide performance and synchronization burdens due computation offloading to HWACCs. This produces valuable and actionable insights for designers to make informed choices on system-level compositions depending on application communication and computation demands.