ECE PhD Proposal Review: Keng Chen

PhD Proposal Review: Design of Accurate and Responsive Power Management Integrated Circuits for Microprocessor Systems

Keng Chen

Location: Zoom Link

Abstract: As technology improves, the processors used in data centers are becoming increasingly powerful. Since the number of complementary metal-oxide semiconductor (CMOS) transistors integrated into these processors continues to rise, it becomes more challenging to design the power management integrated circuits to accurately regulate the supply voltages and ensure fast operational speeds for the processors. Furthermore, with multi-core technology being extensively used in processor design, there is more than just one voltage rail per chip that needs to be precisely regulated. In this research, circuit design methods will be developed to improve the regulation accuracy, both of the output voltage and converter switching frequency, which are proposed for an integrated buck regulator designed for point of load (POL) applications. In order to ensure both accuracy and fast speed of operation, a constant-on-time (COT) architecture was selected for this integrated buck regulator design approach. To provide accurate output voltage regulation, the on-chip feedback sensing network and the bandgap reference circuit need to exhibit high accuracy. For this reason, a highly accurate bandgap reference generation circuit with 5.8 ppm/°C – 13.5 ppm/°C over a wide operational region (-40 °C to 150 °C) has been designed. This bandgap reference circuit has a current-mode architecture and provides a 1.16V reference voltage with a 3.3V supply. A multi-section curvature compensation method is proposed to alleviate the nonlinear temperature-dependent error from the bipolar junction transistor’s base-emitter voltage. The two operational amplifiers utilized in this bandgap reference design to generate proportional-to-absolute-temperature (PTAT) and complementary-to-absolute-temperature (CTAT) current sources share one auxiliary auto-zero amplifier to ensure low input-referred offset voltage. Within many voltage regulators, the feedback sensing network consists of multiple operational amplifiers, and a major error source is the impact of the input-referred offset voltages of these amplifiers.

This research introduces the utilization of two different input-referred offset voltage correction methods for multiple amplifiers. The multi-amplifier system under investigation is used for feedback sensing during voltage regulation. It contains an instrumentation amplifier consisting of three folded cascode stages, and an additional amplifier configured as a unity-gain buffer for a reference voltage. The first method in this work alleviates voltage offsets in a 4-amplifier system based on a shared auxiliary amplifier correction circuit that switches between different target amplifiers. The second method applies a chopping-based auto-zero procedure to cancel the input-referred offset voltage of the same system. Since chopping causes voltage ripples, a correction circuit with a successive approximation register (SAR) analog-to-digital converter is used to reduce the output ripples. Both proposed methods can achieve less than 1mV feedback sensing error in voltage regulator applications.
For the constant-on-time buck regulator itself, a new frequency locking loop to regulate the on-time pulse is also proposed in this work. The system shows less than 1% frequency shift over a wide programmable operational frequency range (400 KHz to 2 MHz). This frequency accuracy will further benefit the constant-on-time circuit to meet electromagnetic interference requirements without harming the fast-transient performance.