Yong-Bin Kim
Professor,
Electrical and Computer Engineering
Office
- 327 Dana Research Center
- 617.373.2919
Research Focus
Integrated circuit design and for nanoelectronics and nano technology, high speed system integration for signal processing and communication applications, bio-chip and bio-sensor interface circuit design, electronic neuron circuit design, low power adaptive robot controller circuit design; high performance and low power vlsI design, system-on-chip (soc), and Physical VLSI CAD
About
Prof. Yong-Bin Kim was born in Seoul, South Korea. Prof. Kim received the B.S. degree in Electronic Engineering from Sogang University in Seoul, South Korea, the M.S. degree and PH.D both in Computer Engineering from New Jersey Institute of Technology and Colorado State University, respectively.
From 1982 to 1987, Dr. Kim was with Electronics and Telecommunications Research Institute in South Korea as a Member of technical Staff. From 1990 to 1993 he was with Intel Corp. as a Senior Design Engineer, and involved in micro-controller chip design and Intel P6 microprocessor chip design. From 1993 to 1996 he was with Hewlett Packard Co., Fort Collins, Colorado as a Member of Technical Staff, and involved in HP PA-8000 RISC microprocessor chip design. From 1996 to 1998 he was with Sun Microsystems, Palo Alto, California as an individual contributor, and involved in 1.5GHz Ultra Sparc5 CPU chip design. From 1998 to 2000, he was an assistant professor in the Dept. of Electrical Engineering of University of Utah. He is currently a Professor in the Department of Electrical and Computer Engineering at Northeastern University. His research focuses on high speed low power VLSI circuit design and methodology.
Education
- PhD, Colorado State University, 1996. Joined Northeastern in 2000.
Honors & Awards
Outstanding Paper Award in 2020 IEEE ISOCC conference for the paper titled, “An Ultra-Low-Power Tunable Bump Circuit using Source-Degenerated Differential Transconductor” with a graduate student Yixuan He.
Research Overview
Integrated circuit design and for nanoelectronics and nano technology, high speed system integration for signal processing and communication applications, bio-chip and bio-sensor interface circuit design, electronic neuron circuit design, low power adaptive robot controller circuit design; high performance and low power vlsI design, system-on-chip (soc), and Physical VLSI CAD
Research Labs
HPVLSI Lab: The complexity of today’s VLSI systems requires new design methods. The research of the HPVLSI group focuses on methods and tools for the design of high-speed and low-power Digital / Analog Integrated Circuits.
Microsystems and Electron Devices Lab: The Electron Devices Group at Northeastern University serves as a focus for undergraduate and graduate education in a broad area including MEMS, electronic and magnetic materials, microelectronics, microfabrication, circuits, plasma engineering, and VLSI design.
Selected Research Projects
- Compact and Power Efficient Integrated Voltage Tunable RF Multiferroic Inductors with Wide Tunable Inductance
- – Principal Investigator, Winchester Technology
- Semi-Self Calibration of High Speed Transceiver for DRAM Interface
- – Principal Investigator, Hynix Semiconductor
Department Research Areas
Selected Publications
- He, Y., Choi, M., Kim, Y.-B. (2020). A Tunable High-Gain Low-Noise Transimpedance Amplifier for Biosensing. IEEE International Midwest Symposium on Circuits and Systems on Circuits and Systems (MWSCAS), August 9-12, Springfield, MA, pp.1007-1010.
- He, Y., Choi, M., Kim, K.K, Kim, Y.-B. (2020). An Ultra-Low-Power Tunable Bump Circuit using Source-Degenerated Differential Transconductor. IEEE International SoC Design Conference (ISOCC), Oct. 21-24, Yeosu, South Korea, pp.131-132. (Outstanding Paper Award)
- Aldahlawi, A., Kim, K.K., Kim, Y.-B. (2019). GPU Architecture Optimization For Mobile Computing, IEEE International SoC Design Conference (ISOCC), Oct. 6-9, Jeju, South Korea. 247-248.
- Jeon , G., Kim, K.K., Kim, Y.-B. (2019). Standing Wave Oscillator Based Clock Distribution Minimizing Equivalent Capacitance for Process and Temperature Variation. IEEE International SoC Design Conference (ISOCC), Jeju, South Korea, 241-242.
- Jeon, G., Kim, Y.-B. (2018). Area Ecient 4GB/s Clock Data Recovery Using Improved Phase Interpolator with Error Monitor. IEEE International Midwest Symposium on Circuits and Systems on Circuits and Systems (MWSCAS), Windsor, Canada, 206-209.
- Choi, Y., Jeon, G., Kim, Y.-B., Jung, H.K. (2018). Transceiver Design for LVSTL Signal Interface with a Low Power On-Chip Self Calibration Scheme. Elseviere Integration the VLSI Journal, 63, 148-159.
- Jeon, G., Kim, Y.-B. (2017). Switched Capacitor and Infinite Impulse Response Summation for a Quad-Rate DFE 4Gb/s Data Rate. ACM GLSVLSI Conference, Banff, Alberta, Canada, 439-442.
- Zhu, H., Yang, W., Engel, G., Kim, Y.-B. (2017). A Two-Parameter Calibration Technique Tracking Temperature Variations for Current Source Miamatch in DACs. IEEE Transactions on Circuits and Systems II, 64(4), 387-391.
Jan 07, 2021
Kim Awarded South Korean Patent for Autonomous Impedance Calibration on Semiconductor Devices
ECE Professor Yong-Bin Kim was awarded a South Korean Patent for creating an “Impedance calibration device for semiconductor device.”
Aug 04, 2020
Patent for Improved Receiver Circuit that Recovers the Transmitted Signal with Reduced Power Consumption
ECE Professor Yong Bin Kim was awarded a patent for designing a “receiver circuit”.
Sep 12, 2018
Detecting Trojan Circuits with On-Chip Temperature Sensors
ECE Associate Professor Marvin Onabajo and Professor Yong-Bin Kim were awarded a patent for creating a "method to use on-chip temperature sensors for detection of Trojan circuits". Abstract Source: USPTO […]
Jun 12, 2018
Professor Kim Awarded Patent
ECE Professor Yong-Bin Kim was awarded a patent for creating an “Impedance calibration device for semiconductor device”.
Oct 31, 2016
ECE Professor Kim and PhD Students Receive Best Paper Award
ECE Professor Yong-Bin Kim and two PhD students were given the Best Paper Award from the 2016 International SoC Design Conference in Jeju, Korea. The title of the awarded paper […]
Jul 23, 2015
Best Paper at Midwest Symposium on Circuits and Systems
ECE Associate Professor Yong-Bin Kim's paper on "Full Custom Implementation of a S-Box Circuit Architecture Using Power Gated PLA Structure" was selected as the best paper at the IEEE MWSCAS 2014 conference.
Dec 11, 2013
Kim Receives 2 Honors
Electrical and Computer Engineering Associate Professor Yong-Bin Kim received a best paper award at the International Soc Design Conference and was appointed an Associate Editor of the IEEE Transactions on […]